1. Field of the Invention
The present invention relates to a method of forming fine patterns, such as those used in the fabrication of a semiconductor device using a double patterning process. More particularly, the invention relates to a method of forming contact holes having a very fine pitch using a double patterning process.
This application claims the benefit of Korean Patent Application No. 10-2006-0111225, filed on Nov. 10, 2006, the subject matter of which is hereby incorporated by reference.
2. Description of the Related Art
The fabrication of semiconductor devices involves the application of a complex sequence of processes. Included within this complex sequence are multiple processes adapted to form fine patterns on the various material layers forming contemporary semiconductor devices. The extreme integration densities that characterize contemporary semiconductor devices require the formation of patterns with very small geometries, vertical contact holes with very high aspect ratios, and/or very sharp pitches (i.e., relationships between pattern widths and corresponding separation distances between adjacent pattern components).
An aggregate measure or definition of these pattern sizes and relationships is commonly referred to as a design rule. Recent design rules for contemporary semiconductor devices have been drastically reduced to implement emerging integration density demands. The pressure created by these new design rules is pushing (or exceeding) the very limits of conventional fabrication techniques and related equipment. Indeed, available techniques and equipment can not accurately form the fine patterns and pitches demanded by new design rules.
Many of the inherent limitations of conventional techniques and equipment are related to the photolithography processes commonly applied to the formation of patterns. No where are such limitations more apparent than the formation of contact holes in an insulating layer. Contact holes are a basic structure used in semiconductor devices to vertically connect portions of overlying material layers.
As design rule geometries shrink, the lateral area of a contact hole is reduced relative to its vertical depth. In other words, its aspect ratio increases. The formation of relatively smaller and deeper contacts (i.e., contact holes with higher aspect ratios) presents great challenges to conventional photolithography processes which have reached the limit of their resolution. As a result, it is very difficult to reduce minimal separation distances between contacts (i.e., limitations imposed by conventional photolithography processes define contact hole alignment margins that preclude further reductions in the spacing of contact holes).
The formation of high aspect ratio contact holes presents other challenges unrelated to the resolution limitations imposed by conventional photolithography processes. For example, the physical formation of a contact hole requires etching of a material layer. Given the reduced contact hole alignment margins required by emerging design rules, relatively slow etching processes must be applied to the formation of contact holes. Unfortunately, such relatively low etch rate processes sometimes fail to fully form the desired set of contact holes and overall fabrication productivity and quality suffers.